The data path features of Kirin X90 and Kirin 9030 processors are different. The details are as follows:
Table 1 Data movement compatibility
| Basic API | Compatibility |
|---|---|
| DataCopy: L1 Buffer->Bias Table Buffer | - Kirin X90 AI processor: Only the fp16 data type is supported in floating-point mode. The L1 buffer requires non-compact arrangement (occupying 32-bit space, where the upper 16 bits are dummy data). After L1 buffer->Bias Table buffer data movement, the fp16 data and dummy data are moved together to the Bias Table buffer. The Mmad basic API automatically obtains valid lower 16-bit data for computation. - Kirin 9030 AI processor: The length of each data block transferred from the L1 buffer to the Bias Table buffer is changed from 64 bytes to 32 bytes. The interval between two data blocks on the destination operand is changed from 64 bytes to 32 bytes. Only the fp16 data type is supported in floating-point mode, and the L1 buffer requires compact arrangement. |
| LoadDataWithSparse | Not supported. Structured sparsity is not supported. Therefore, operators need to use normal dense matrices for computation. |
| SetLoadDataBoundary | Not supported. Sets the boundary value of the L1 buffer when Load3D is called. If the address of the source operand in the L1 buffer exceeds the configured boundary when the instruction processes the source operand, data is read from the start address of the L1 buffer. The value 0 indicates that there is no boundary and the entire L1 buffer can be used. To cyclically read operands in the L1 buffer, you need to manually split the corresponding Load3D API into multiple instructions for manual wraparound. |
| LoadDataWithTranspose | Kirin 9030 AI processor: dstFracGap must be set to 0. |
| LoadData | Load3Dv2 API of B1->B2 is not supported. |