目录

Synchronization Control

The Kirin X90 and Kirin 9030 processors do not support hard synchronization between multiple NPU cores. (Hardware synchronization uses the full-core synchronization instructions of the hardware to ensure multi-core synchronization.) However, the NPUs of the KirinX90 and Kirin9030 processors use a single-core coupling architecture (AICORE: 1 x AIC + 1 x AIV). Therefore, software compatibility is implemented for the following multi-core synchronization APIs, and developers do not need to be aware of the details.

Table 1 Multi-core synchronization compatibility

Basic API Compatibility
SyncAll (hard synchronization), CrossCoreSetFlag, and CrossCoreWaitFlag Compatible in software.